Product no.: PGY-I3C-EX-PD
PGY-I3C-EX-PD is the leading instrument that enables the design and test engineers to test the I3C designs for its specifications by configuring PGY-I3C-EX-ED as master/slave, generating I3C traffic with error injection capability and decoding I3C Protocol decode packets.
8,000.00 € *
Product data sheet
I3C (Improved Inter Integrated Circuit) is also known as MIPI I3C and SenseWire. I3C is an emerging industry standard for multidrop serial data buses. I3C was developed in 2016 in cooperation between electronics and computer-related companies and the Mobile Industry Processor Interface Alliance (MIPI Alliance). I3C adds a significant number of system interface features while retaining upward compatibility with existing I²C slave devices while native I3C devices support higher data rates, similar to Serial Peripheral Interface (SPI). With I3C one or more master devices can be connected to one or more slaves over the bus. Prodigy Technovations is one of the first manufacturers to offer an I3C protocol analyzer for this purpose.
I3C was initially intended for mobile applications as a single interface that can be used for all digitally interfaced sensors. But now it's also for all mid-speed embedded and deeply embedded applications across sensors, power regulators, actuators, MCUs, and FPGAs... I3C improves upon the features of I2C while maintaining backward compatibility. The interface is useful for other applications, as it offers high-speed data transfer at very low power levels while allowing multi-drop between the host processor and peripherals, which is highly desirable for any embedded system.
The main purpose from the mipi alliance:
I²C (Inter-Integrated Circuit) was developed in 1982 and is a serial synchronous two-wire bus. It is still the industry standard for monitoring, diagnostic and control solutions in many embedded applications. I2C is easy to implement, low in cost and fast in high speed mode (Hs-mode) up to 3.4 Mbps. I2C is a true bidirectional two-wire bus in a master / slave architecture with software addressing and integrated transmission protocol. It requires only one clock line SCL (Serial Clock Line) and one data line SDA (Serial Data Line).
This means that a microcontroller can control multiple chips with only two I / O pins and simple software. Originally, the I2C bus was designed for interactions between a few ICs mounted on the same board, such as controlling the tuning of TV sets or radios.
The increasing numbers of sensors in mobile devices require application processors and/or sensor hubs with a higher number of logic pins used for sensor communication and control. In a typical application, multiple digital communication interfaces are used along with supporting logic lines for dedicated interrupt and sleep signals. Top tier smartphones include 10 or more sensors and a critical point has been reached where 20 or more logic signals are required.
Further deficits of I2C:
If large amounts of data need to be transferred is an another de facto standard the SPI interface (Serial Peripheral Interface). SPI requires four communication lines:
Many features are not clearly defined in the SPI standard. Because of this, many settings are required and this leads to different and incompatible devices.
With I3C there is a consistent method for communication with the different sensors. This prevents integration problems as developers are no longer confronted with the fragmentation of the digital interfaces (I2C, SPI, UART, ...).