StarProg-A programmer for automation
The StarProg-A from Dediprog supports MCU, CPLD, SPI NOR Flash, SPI NAND Flash and EEPROM On Board Programming (ICP / ISP). It is optimized for the integration of automated machines and can easily be used in development and mass production.
Modeloverview
Model Name |
SF100 |
SF600 |
SF600 Plus |
SF700 |
K110 |
StarProg-A |
StarProg-U |
NuProg-E2 |
Support IC Types |
SPI NOR Flash |
SPI NOR Flash |
SPI Flash NOR |
SPI NOR, SPI NAND and SPI Octa NOr |
SPI NOR, SPI NAND, and EEPROM |
MCU, CPLD, SPI NOR Flash, SPI NAND Flash, and EEPROM |
All IC Types (Except for UFS) |
UFS (Upt to 180 MB/s) eMMC (Up to 100 MB/s) |
OBP |
✓ |
X |
Socket Site |
Bottom Board
(Optional)
|
One site |
Standalone |
X |
✓ |
X |
Software |
SF Software |
Dediware |
3rd Party Integration |
CLI |
ATE Port, CLI |
ATE Port, CLI, DLL API (Optonal) |
CLI |
X |
*CLI = Command Line
*OBP = On Board Programming (ISP/ICP)
Starprog-A Highlights
- Supports 1.2 V ultra low voltage IC and 1.8 V low voltage IC
- Supports different types of ISP protocols
- SWD, JTAG, SPI, I2C, BDM, UART and SWIM ... etc.
- Support different IC families
- MCU, CPLD, SPI NOR Flash, SPI NAND Flash and EEPROM.
- Supports a wide range of file formats
- Binary, Intel Hex, Motorola and ROM ... etc.
- Supports standalone mode
- Can program without connecting to a computer.
Other features
- Palm size
- Command line, Labview driver and DLL API (support for serialization and unique key programming) for the new development and integration are available.
Optimized for automated machines
1. Start the quick self-test.
2. Signal improvements allow much longer signal cable lengths for integration.
3. Software voltage and frequency control can stabilize the programming signal.
4. The ATE port in the ISP adapter provides the remote control via the Busy / Pass / Error and Start pins.
5. Various standard adapters are available. Programmable ICs can be programmed online, offline or independently and can quickly clarify and eliminate the production problems.
6. Help multiple programmers program ICs (same file).
Pin header mapping |
Pin lin1 |
Pin number |
Pin lin2 |
Vpp |
1 |
2 |
Vcc |
Vpp_ref |
3 |
4 |
Vcc_ref |
3.3V |
5 |
6 |
GND |
IO1 |
7 |
8 |
IO2 |
IO3 |
9 |
10 |
IO4 |
IO5 |
11 |
12 |
IO6 |
IO7 |
13 |
14 |
IO8 |
GPIO1 |
15 |
16 |
GPIO2 |
GPIO3 |
17 |
18 |
GPIO4 |
GND |
19 |
20 |
GND |
ATE |
Pin lin1 |
Pin number |
Pin lin2 |
NC |
1 |
2 |
3.3V |
Busy |
3 |
4 |
GND |
Pass |
5 |
6 |
NC |
Start |
7 |
8 |
NC |
Fail |
9 |
10 |
NC |
SPA-ISP-ADP-STD
