The RF Front-end control interface (RFFE) Serial bus interface is emerging as a chosen for controlling RF front-end devices. There are a variety of front end devices such as Power Amplifiers (PA), Low-Nose Amplifiers (LNA), filters, switches, power management modules, antenna tuners. It is widely used in mobile devices.
PGY-RFFE-EX-PD is the leading instrument that enables the design and test engineers to test the RFFE interface for its specifications by configuring PGY-RFFE-EX-PD as master/slave, generating RFFE traffic with error injection capability, amplitude variation and decoding RFFE Protocol decode packets.
The product features are as follows:
- Supports RFFE2.0/2.1 Specification
- Ability to configure it as Master or Slave
- Generate different RFFE at full speed and half of the full frequency speed
- Error Injection such as parity errors and ACK/NACK errors
- Variable RFFE data speeds
- Simultaneously generateRFFE traffic and Protocol decode of the Bus
- Timing diagram of Protocol decoded bus
- Listing view of Protocol activity
- Error Analysis in Protocol Decode
- Ability to write exerciser script to combine multiple data frame generation at different data speeds
- USB2/3 host computer interface
- Flexibility to upgrade to the unit for evolving RFFE Specification
Multidomain View provides the complete view of RFFE Protocol activity in a single GUI. User can easily set up the analyzer to generate RFFE traffic using a GUI or script. User can set different trigger conditions from the setup menu to capture Protocol activity at a specific event and decode the protocol transactions between Master and Slave. The decoded results can be viewed in the timing diagram and Protocol listing window with autocorrelation. This comprehensive view of information makes it industry best, offering an easy to use solution to debug the RFFE protocol activity.
PGY-RFFE-EX-PD supports RFFE traffic generation using GUI and Script. User can generate simple traffic generation using the GUI to test the DUT. Script based GUI provides flexibility to emulate the complete expected traffic in the real world including error injections. In this sample script, the user can generate RFFE traffic as below.
- Script line #3: SET Dynamic Address using slave static
- Script line #4: SETMWL with Data Parity Error
- Script line #5: GETMWL with Command Parity Error
- Script line #6: ENTHDR0 DDR mode with CRC Error
Timing Diagram and Protocol Listing View
Timing view provides the plot of SCLK and SDATA signals with bus diagram. Overlaying of Protocol bits on the digital timing waveform will help easy debugging of Protocol decoded data. Cursor and Zoom features will make it convenient to analyze Protocol in timing diagram for any timing errors.
Protocol window provides the decoded packet information in each state and all packet details. Selected frame in Protocol listing window will be auto-correlated in timing view to view the timing information of the packet.
Powerful Trigger Capabilities
PGY-RFFE-EX-PD supports Auto, simple and advanced trigger capabilities. Analyzer can trigger on any of the Protocol packets such as Ext. Reg. Write, Ext. Reg, read and so forth message. Advanced Trigger provides the flexibility to monitor multiple trigger conditions and can set multiple state trigger machines.